# References #/ref/amba_ahb_spec AMBA AHB Protocol Specification^[https://developer.arm.com/documentation/ihi0033/latest/] #ref/amba_apb_spec AMBA APB Protocol Specification^[https://documentation-service.arm.com/static/60d5b505677cf7536a55c245?token=] #ref/amba/axi_spec AMBA AXI Protocol Specification^[https://developer.arm.com/documentation/ihi0022/latest/] Wishbone Specification^[https://cdn.opencores.org/downloads/wbspec_b3.pdf] "Virtualization Essentials" (Third Edition) by Matthew Portnoy (Sybex) QEMU Internals blog: <https://airbus-seclab.github.io/qemu_blog/> #ref/Benneé Benneé, A. (2020, July 22). *The Evolution of the QEMU translator*. www.linaro.org. Retrieved November 22, 2023, from https://www.linaro.org/blog/the-evolution-of-the-qemu-translator/ "Another RISC-V ISA simulator" <https://github.com/mariusmm/RISC-V-TLM> #ref/Cadence https://resources.pcb.cadence.com/blog/2019-best-pcb-routing-methods-for-bga-escape-routing #ref/Rushby Rushby, J. (1999). *Partitioning in Avionics Architectures: Requirements, Mechanisms, and Assurance*. NASA Technical Report DOT/FAA/AR99/58. <https://ntrs.nasa.gov/citations/19990052867> #ref/Oppen"Digital Signal Processing", Oppenheimer, Shafer <https://www.synopsys.com/blogs/chip-design/what-is-clock-domain-crossing.html> <https://docs.xilinx.com/v/u/en-US/ug474_7Series_CLB> <https://en.wikichip.org/wiki/tsmc/cowos#:~:text=CoWoS%20is%20a%202.5D,better%20interconnect%20density%20and%20performance>. https://www.semianalysis.com/p/ai-capacity-constraints-cowos-and "DFM Guidebook", Altium <https://resources.altium.com/sites/default/files/uberflip_docs/file_1156.pdf> Eurocircuits: "How to make a 4-layer PCB board" (Video) https://youtu.be/sIV0icM_Ujo?si=-8Eh2E4a2-Y4x6mi https://indico.cern.ch/event/68278/contributions/1234555/attachments/1024465/1458672/VMEbus.pdf David Greaves - Modern System-on-Chip Design on Arm-Arm Education Media (2021) #ref/Tremosa "Electrónica del Estado Sólido", Ángel Tremosa (Ediciones Marymar) #ref/Thain _Introduction to Compilers and Language Design Second Edition_, Prof. Douglas Thain University of Notre Dame #ref/Kaeslin *Digital Integrated Circuit Design From VLSI Architectures to CMOS Fabrication*, Hubert Kaeslin, ETH Zurich. Cambridge Press. #ref/ADSP https://www.analog.com/media/en/dsp-documentation/processor-manuals/396096833ts201_hwr.pdf #ref/Subhoda SUBODHA CHARLES and PRABHAT MISHRA, _A Survey of Network-on-Chip Security Attacks and Countermeasures_, University of Florida, USA #ref/Goossens Bernard Goossens, _Guide to Computer Processor Architecture A RISC-V Approach, with High-Level Synthesis_, Springer. #ref/Peterson https://resources.altium.com/p/current-state-ai-pcb-design-2023 #ref/Venkataramani "DIGITAL SIGNAL PROCESSORS Architecture, Programming and Applications" (Second Edition), B.Venkataramani, M.Bhaskar (McGraw-Hill) #ref/Geng HWAIYU GENG, "Data Center Handbook: Plan, Design, Build, and Operations of a Smart Data Center" (Second Edition) (Wiley) #ref/Skorjanec https://www.eaton.com/content/dam/eaton/products/backup-power-ups-surge-it-power-distribution/power-management-software-connectivity/alliances/open-compute-project/eaton-ocp-orv3-open-rack-solutions-white-paper-wp159008en.pdf #ref/Venn Zero To ASIC course: https://zerotoasiccourse.com/ #ref/Golson "Synchronization and Metastability", Steve Golson. Trilobyte Systems. Carlisle, Massachusetts USA. Link: https://trilobyte.com/pdf/golson_snug14.pdf #ref/JKU Institute for Integrated Circuits (IIC) at the Johannes Kepler University Linz (JKU) https://github.com/iic-jku/IIC-OSIC-TOOLS #ref/JKU_Course Analog Circuit Design Course (JKU) https://iic-jku.github.io/analog-circuit-design/ #ref/Lau "Chiplet Design and Heterogeneous Integration Packaging", John H. Lau. Springer. #ref/Digilent "Field-Programmable Gate Arrays Explained A high-level introduction to FPGAs" (Digilent) URL: https://files.digilent.com/reference/Field_Programmable_Gate_Arrays_Explained.pdf #ref/Hastings "The Art of Analog Layout", Alan Hastings (Prentice Hall)